The present invention relates generally to multiplex wiring systems for use in motor vehicles and, more particularly, to a method and apparatus for formatting and transmitting data bits divided into subbits of unequal, preferably progressively increasing duration in a multiplex wiring system.
Multiplex wiring systems have been used in motor vehicles to provide communications over a reduced number of wires for a wide range of accessory control and computer communications applications. In such systems, a plurality of communication nodes, each capable of serially transmitting and receiving digital data, are coupled to a data bus, such as a twisted wire pair. The nodes convert signals received from local computers, sensors, transducers or the like into a format acceptable for transmission on the data bus. For example, a node may convert parallel data from a local computer or sensor into serial data. Conversely, serial data signals appearing on the data bus are transformed by a node into a format usable by the node.
The serial digital data generated by the nodes is generally formatted to sequentially include a start-of-message signal, an address for a particular receiving node, message data for performing an operation or conveying information regarding the current status of the node, and an end-of-message signal. Each communication node detects the start-of-message signal for actuating the appropriate receiving circuitry. However, only the designated receiving node recognizes its own address and then acts upon the instruction data following its address. An example of such a multiplex wiring system is disclosed in U.S. Pat. No. 3,651,454 issued to Venema et al.
Various data string formats have been used in the past to transfer information between communication modules. Commonly assigned U.S. Pat. No. 4,792,950 issued to Volk et al discloses a data signal which uses a pulse width modulated (PWM) format. In this PWM format, each data bit is divided into three subbits of equal duration. For example, a bit of twenty, four microseconds is comprised of three eight microsecond subbits. A logic zero (0) data bit is defined by two initial subbits at a high voltage level followed by one subbit at a low voltage level. Conversely, a logic one (1) data bit is comprised of one high voltage level subbit followed by two low voltage level subbits.
Using serial data transmission and known data string formats as opposed to parallel transmission reduces the number of wires needed for the data bus and reduces the number of line drivers, receivers and other line conditioning circuits required with corresponding cost reductions. Unfortunately, a reduction in the allowable data rate is also experienced since information is transmitted sequentially over the twisted wire pair instead of simultaneously over a plurality of parallel wires. The data rate is further limited by electromagnetic interference (EMI), capacitance within the system, component start-up delay and other physical limitations within the harsh motor vehicle environment.
Accordingly, there is a need for improved multiplex wiring systems and methods for transmitting data to provide for increased serial data transmission rates in motor vehicle applications.